HD6417750RF240DV Datasheet, PDF (755/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

SH7750, SH7750S, SH7750R Group
Section 15 Serial Communication Interface (SCI)
b. If the MPIE bit in the SCSCR1 register is cleared to 0
A multiprocessor interrupt indicating that data (ID) with the multiprocessor bit (MPB) set
to 1 was received, or a receive data full interrupt (RXI) occurred when data with the
multiprocessor bit (MPB) set to 0 and intended for this station was received.
2. Method for determining whether received data is ID or data
Do not use the MPB bit in the SCSSR1 register for software processing.
When using software processing to determine whether received data is ID (MPB = 1) or data
(MPB = 0), use a procedure such as saving a user-defined flag in memory to indicate receive
start.
R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013
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