HD6417750RF240DV Datasheet, PDF (286/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

Section 8 Pipelining
SH7750, SH7750S, SH7750R Group
10. OCBI: 1 issue cycle
I
D
EX
MA
S
MA
11. OCBP, OCBWB: 1 issue cycle
I
D
EX
MA
S
MA
MA
MA
MA
12. MOVCA.L: 1 issue cycle
I
D
EX
MA
S
MA
MA
MA
MA
MA
MA
13. TRAPA: 7 issue cycles
I
D
EX
NA
S
D
EX
NA
S
D
EX
NA
S
D
EX
NA
S
D
EX
NA
S
D
EX
NA
S
D
EX
NA
S
14. LDC to DBR/Rp_BANK/SSR/SPC/VBR, BSR: 1 issue cycle
I
D
EX
NA
S
SX
SX
15. LDC to GBR: 3 issue cycles
I
D
EX
NA
S
D
SX
D
SX
16. LDC to SR: 4 issue cycles
I
D
EX
NA
S
D
SX
D
SX
D
SX
17. LDC.L to DBR/Rp_BANK/SSR/SPC/VBR: 1 issue cycle
I
D
EX
MA
S
SX
SX
18. LDC.L to GBR: 3 issue cycles
I
D
EX
MA
S
D
SX
D
SX
Figure 8.2 Instruction Execution Patterns (cont)
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R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013