HD6417750RF240DV Datasheet, PDF (313/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

SH7750, SH7750S, SH7750R Group
Section 9 Power-Down Modes
9.1.2 Register Configuration
Table 9.2 shows the registers used for power-down mode control.
Table 9.2 Power-Down Mode Registers
Name
Abbreviation R/W
Standby control STBCR
R/W
register
Standby control STBCR2
R/W
register 2
Clock stop
CLKSTP00
R/W
register 00*
Clock release
register 00*
CLKSTPCLR00 W
Note: * SH7750R only
Area 7
Initial Value P4 Address Address
Access
Size
H'00
H'FFC00004 H'1FC00004 8
H'00
H'FFC00010 H'1FC00010 8
H'00000000 H'FE0A0000 H'1E0A0000 32
H'00000000 H'FE0A0008 H'1E0A0008 32
9.1.3 Pin Configuration
Table 9.3 shows the pins used for power-down mode control.
Table 9.3 Power-Down Mode Pins
Pin Name
Processor status 1
Processor status 0
Abbreviation
STATUS1
STATUS0
I/O
Output
Hardware standby CA
request
(SH7750S and
SH7750R only)
Legend:
H: High level
L: Low level
Input
Function
Indicate the processor's operating status.
(STATUS1, STATUS0)
HH: Reset
HL: Sleep mode
LH: Standby mode
LL: Normal operation
Transits to hardware standby mode by a
low-level input to the pin.
R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013
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