HD6417750RF240DV Datasheet, PDF (756/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

Section 15 Serial Communication Interface (SCI)
SH7750, SH7750S, SH7750R Group
Start of reception
Set MPIE bit to 1
RXI = 1?
No
Yes
Yes
User-defined receive
start flag = 1?
No
Read ORER and FER flags in SCSSR1
FER or ORER = 1?
Yes
No
Read RDRF flag in SCSSR1
No
MPIE = 0?
Yes
Read receive data in SCRDR1
Set RDRF = 0 and MPIE = 1
No
This station's ID?
Yes
Set user-defined receive start flag to 1
End of ID reception handling
Read ORER and FER flags in SCSSR1
FER or ORER = 1?
Yes
No
Read receive data in SCRDR1
No
All data received?
Yes
Clear user-defined receive start flag to 0
RTE
End of data reception
Error handling
Figure 15.15 Sample Multiprocessor Serial Reception Flowchart (1)
Page 704 of 1076
R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013