HD6417750RF240DV Datasheet, PDF (742/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

Section 15 Serial Communication Interface (SCI)
SH7750, SH7750S, SH7750R Group
Initialization
Clear TE and RE bits
in SCSCR1 to 0
Set CKE1 and CKE0 bits
in SCSCR1 (leaving TE and
RE bits cleared to 0)
Set transmit/receive format
in SCSMR1
Set value in SCBRR1
Wait
1-bit interval elapsed?
No
Yes
Set TE and RE bits in SCSCR1
to 1, and set RIE, TIE, TEIE,
and MPIE bits
1. Set the clock selection in SCSCR1.
Be sure to clear bits RIE, TIE, TEIE,
and MPIE, and bits TE and RE, to 0.
When clock output is selected in
asynchronous mode, it is output
immediately after SCSCR1 settings
are made.
2. Set the transmit/receive format in
SCSMR1.
3. Write a value corresponding to the
bit rate into SCBRR1. (Not
necessary if an external clock is
used.)
4. Wait at least one bit interval, then set
the TE bit or RE bit in SCSCR1 to 1.
Also set the RIE, TIE, TEIE, and
MPIE bits.
Setting the TE and RE bits enables
the TxD and RxD pins to be used.
When transmitting, the SCI will go to
the mark state; when receiving, it will
go to the idle state, waiting for a start
bit.
End
Figure 15.7 Sample SCI Initialization Flowchart
Serial Data Transmission (Asynchronous Mode): Figure 15.8 shows a sample flowchart for
serial transmission.
Use the following procedure for serial data transmission after enabling the SCI for transmission.
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R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013