HD6417750RF240DV Datasheet, PDF(1073/1132 Page) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

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HD6417750RF240DV Datasheet, PDF (1073/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

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SH7750, SH7750S, SH7750R Group

Appendix A Address List

Module Register

TMU TCR4*5

TMU TOCR

TMU TSTR

TMU TCOR0

TMU TCNT0

TMU TCR0

TMU TCOR1

TMU TCNT1

TMU TCR1

TMU TCOR2

TMU TCNT2

TMU TCR2

TMU TCPR2

Area 7

P4 Address Address*1

Power-On

Size Reset

Manual

Reset

Synchro-

nization

Sleep Standby Clock

H'FE10 001C H'1E10 001C 16 H'0000

Held

Held Held

Pck

H'FFD8 0000 H'1FD8 0000 8

H'FFD8 0004 H'1FD8 0004 8

H'00

H'00

H'00

H'00

Held Held

Pck

Held H'00*2 Pck

H'FFD8 0008 H'1FD8 0008 32 H'FFFF FFFF H'FFFF FFFF Held Held

Pck

H'FFD8 000C H'1FD8 000C 32 H'FFFF FFFF H'FFFF FFFF Held Held

Pck

H'FFD8 0010 H'1FD8 0010 16 H'0000

H'0000

Held Held

Pck

H'FFD8 0014 H'1FD8 0014 32 H'FFFF FFFF H'FFFF FFFF Held Held

Pck

H'FFD8 0018 H'1FD8 0018 32 H'FFFF FFFF H'FFFF FFFF Held Held

Pck

H'FFD8 001C H'1FD8 001C 16 H'0000

H'0000

Held Held

Pck

H'FFD8 0020 H'1FD8 0020 32 H'FFFF FFFF H'FFFF FFFF Held Held

Pck

H'FFD8 0024 H'1FD8 0024 32 H'FFFF FFFF H'FFFF FFFF Held Held

Pck

H'FFD8 0028 H'1FD8 0028 16 H'0000

H'0000

Held Held

Pck

H'FFD8 002C H'1FD8 002C 32 Held

Held

Held Held

Pck

SCI SCSMR1 H'FFE0 0000 H'1FE0 0000 8 H'00

SCI SCBRR1 H'FFE0 0004 H'1FE0 0004 8 H'FF

SCI SCSCR1 H'FFE0 0008 H'1FE0 0008 8 H'00

SCI SCTDR1 H'FFE0 000C H'1FE0 000C 8 H'FF

SCI SCSSR1 H'FFE0 0010 H'1FE0 0010 8 H'84

SCI SCRDR1 H'FFE0 0014 H'1FE0 0014 8 H'00

SCI SCSCMR1 H'FFE0 0018 H'1FE0 0018 8 H'00

SCI

SCSPTR1 H'FFE0 001C H'1FE0 001C 8

H'00*2

H'00

H'FF

H'00

H'FF

H'84

H'00

H'00

H'00*2

Held H'00

Pck

Held H'FF

Pck

Held H'00

Pck

Held H'FF

Pck

Held H'84

Pck

Held H'00

Pck

Held H'00

Pck

Held H'00*2 Pck

SCIF SCSMR2 H'FFE8 0000 H'1FE8 0000 16 H'0000

H'0000

Held Held

Pck

SCIF SCBRR2 H'FFE8 0004 H'1FE8 0004 8 H'FF

H'FF

Held Held

Pck

SCIF SCSCR2 H'FFE8 0008 H'1FE8 0008 16 H'0000

H'0000

Held Held

Pck

SCIF SCFTDR2 H'FFE8 000C H'1FE8 000C 8 Undefined Undefined Held Held

Pck

SCIF SCFSR2 H'FFE8 0010 H'1FE8 0010 16 H'0060

H'0060

Held Held

Pck

SCIF SCFRDR2 H'FFE8 0014 H'1FE8 0014 8 Undefined Undefined Held Held

Pck

SCIF SCFCR2 H'FFE8 0018 H'1FE8 0018 16 H'0000

H'0000

Held Held

Pck

SCIF

SCIF

SCFDR2 H'FFE8 001C H'1FE8 001C 16

SCSPTR2 H'FFE8 0020 H'1FE8 0020 16

H'0000

H'0000*2

H'0000

Held Held

Pck

H'0000*2

Held Held

Pck

SCIF SCLSR2 H'FFE8 0024 H'1FE8 0024 16 H'0000

H'0000

Held Held

Pck

R01UH0456EJ0702 Rev. 7.02

Sep 24, 2013

Page 1021 of 1076

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