HD6417750RF240DV Datasheet, PDF (870/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

Section 18 I/O Ports
SH7750, SH7750S, SH7750R Group
18.2.5 GPIO Interrupt Control Register (GPIOIC)
The GPIO interrupt control register (GPIOIC) is a 16-bit readable/writable register that performs
16-bit interrupt input control.
GPIOIC is initialized to H'00000000 by a power-on reset. It is not initialized by a manual reset or
in standby mode, and retains its contents.
GPIO interrupts are active-low level interrupts. Bit-by-bit masking is possible, and the OR of all
the bits set as GPIO interrupts is used for interrupt detection. Which bits interrupts are input to can
be identified by reading the PDTRA register.
Bit: 15
14
13
12
11
10
9
8
PTIREN15 PTIREN14 PTIREN13 PTIREN12 PTIREN11 PTIREN10 PTIREN9 PTIREN8
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 7
6
5
4
3
2
1
0
PTIREN7 PTIREN6 PTIREN5 PTIREN4 PTIREN3 PTIREN2 PTIREN1 PTIREN0
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit n (n = 0–15)—Port Interrupt Enable (PTIRENn): Specifies whether interrupt input is
performed for each bit.
Bit n: PTIRENn
Description
0
Port m (m = 0–15) of 16-bit port is used as a normal I/O port (Initial value)
1
Port m (m = 0–15) of 16-bit port is used as a GPIO interrupt*
Note: * When using an interrupt, set the corresponding port to input in the PCTRA register
before making the PTIRENn setting.
Page 818 of 1076
R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013