HD6417750RF240DV Datasheet, PDF (301/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

SH7750, SH7750S, SH7750R Group
Section 8 Pipelining
Table 8.3 Execution Cycles
Functional
Category No. Instruction
Data
1
transfer
instructions
2
3
EXTS.B
EXTS.W
EXTU.B
Rm,Rn
Rm,Rn
Rm,Rn
4 EXTU.W Rm,Rn
5 MOV
Rm,Rn
6 MOV
#imm,Rn
7 MOVA @(disp,PC),R0
8 MOV.W @(disp,PC),Rn
9 MOV.L @(disp,PC),Rn
10 MOV.B @Rm,Rn
11 MOV.W @Rm,Rn
12 MOV.L @Rm,Rn
13 MOV.B @Rm+,Rn
14 MOV.W @Rm+,Rn
15 MOV.L @Rm+,Rn
16 MOV.B @(disp,Rm),R0
17 MOV.W @(disp,Rm),R0
18 MOV.L @(disp,Rm),Rn
19 MOV.B @(R0,Rm),Rn
20 MOV.W @(R0,Rm),Rn
21 MOV.L @(R0,Rm),Rn
22 MOV.B @(disp,GBR),R0
23 MOV.W @(disp,GBR),R0
24 MOV.L @(disp,GBR),R0
25 MOV.B Rm,@Rn
26 MOV.W Rm,@Rn
27 MOV.L Rm,@Rn
28 MOV.B Rm,@-Rn
29 MOV.W Rm,@-Rn
30 MOV.L Rm,@-Rn
31 MOV.B R0,@(disp,Rn)
Instruc-
Execu-
Lock
tion Issue
tion
Group Rate Latency Pattern Stage Start Cycles
EX
1
1
#1
— ——
EX
1
1
#1
— ——
EX
1
1
#1
— ——
EX
1
1
#1
— ——
MT
1
0
#1
— ——
EX
1
1
#1
— ——
EX
1
1
#1
— ——
LS
1
2
#2
— ——
LS
1
2
#2
— ——
LS
1
2
#2
— ——
LS
1
2
#2
— ——
LS
1
2
#2
— ——
LS
1
1/2
#2
— ——
LS
1
1/2
#2
— ——
LS
1
1/2
#2
— ——
LS
1
2
#2
— ——
LS
1
2
#2
— ——
LS
1
2
#2
— ——
LS
1
2
#2
— ——
LS
1
2
#2
— ——
LS
1
2
#2
— ——
LS
1
2
#3
— ——
LS
1
2
#3
— ——
LS
1
2
#3
— ——
LS
1
1
#2
— ——
LS
1
1
#2
— ——
LS
1
1
#2
— ——
LS
1
1/1
#2
— ——
LS
1
1/1
#2
— ——
LS
1
1/1
#2
— ——
LS
1
1
#2
— ——
R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013
Page 249 of 1076