HD6417750RF240DV Datasheet, PDF (37/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

Section 15 Serial Communication Interface (SCI)
Figure 15.1 Block Diagram of SCI............................................................................................. 657
Figure 15.2 MD0/SCK Pin ......................................................................................................... 674
Figure 15.3 MD7/TxD Pin.......................................................................................................... 675
Figure 15.4 RxD Pin ................................................................................................................... 675
Figure 15.5 Data Format in Asynchronous Communication
(Example with 8-Bit Data, Parity, Two Stop Bits).................................................. 687
Figure 15.6 Relation between Output Clock and Transfer Data Phase
(Asynchronous Mode)............................................................................................. 689
Figure 15.7 Sample SCI Initialization Flowchart ....................................................................... 690
Figure 15.8 Sample Serial Transmission Flowchart ................................................................... 691
Figure 15.9 Example of Transmit Operation in Asynchronous Mode
(Example with 8-Bit Data, Parity, One Stop Bit) .................................................... 693
Figure 15.10 Sample Serial Reception Flowchart (1)................................................................. 694
Figure 15.10 Sample Serial Reception Flowchart (2)................................................................. 695
Figure 15.11 Example of SCI Receive Operation (Example with 8-Bit Data, Parity,
One Stop Bit) ......................................................................................................... 697
Figure 15.12 Example of Inter-Processor Communication Using Multiprocessor Format
(Transmission of Data H'AA to Receiving Station A)........................................... 699
Figure 15.13 Sample Multiprocessor Serial Transmission Flowchart ........................................ 700
Figure 15.14 Example of SCI Transmit Operation (Example with 8-Bit Data,
Multiprocessor Bit, One Stop Bit) ......................................................................... 702
Figure 15.15 Sample Multiprocessor Serial Reception Flowchart (1)........................................ 704
Figure 15.15 Sample Multiprocessor Serial Reception Flowchart (2)........................................ 705
Figure 15.16 Example of SCI Receive Operation (Example with 8-Bit Data,
Multiprocessor Bit, One Stop Bit) ......................................................................... 706
Figure 15.17 Data Format in Synchronous Communication ...................................................... 707
Figure 15.18 Sample SCI Initialization Flowchart ..................................................................... 709
Figure 15.19 Sample Serial Transmission Flowchart ................................................................. 710
Figure 15.20 Example of SCI Transmit Operation ..................................................................... 712
Figure 15.21 Sample Serial Reception Flowchart (1)................................................................. 713
Figure 15.21 Sample Serial Reception Flowchart (2)................................................................. 714
Figure 15.22 Example of SCI Receive Operation....................................................................... 715
Figure 15.23 Sample Flowchart for Serial Data Transmission and Reception ........................... 716
Figure 15.24 Receive Data Sampling Timing in Asynchronous Mode ...................................... 720
Figure 15.25 Example of Synchronous Transmission by DMAC .............................................. 721
Figure 15.26 Example Countermeasure on SH7750................................................................... 723
Figure 15.27 Clock Input Timing of SCK Pin ............................................................................ 723
R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013
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