HD6417750RF240DV Datasheet, PDF (1091/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

SH7750, SH7750S, SH7750R Group
Appendix F Synchronous DRAM Address Multiplexing Tables
Appendix F Synchronous DRAM Address
Multiplexing Tables
(1) BUS 64 (16M: 512k × 16b × 2) × 4 *
AMX 0 AMXEXT 0
16M, column-addr-8bit
8MB
LSI Address Pins
Synchronous DRAM
RAS Cycle CAS Cycle
Address Pins
Function
A14
A22
A22
A11
BANK selects bank address
A13
A21
H/L
A10
Address precharge setting
A12
A20
0
A9
Address
A11
A19
0
A8
A10
A18
A10
A7
A9
A17
A9
A6
A8
A16
A8
A5
A7
A15
A7
A4
A6
A14
A6
A3
A5
A13
A5
A2
A4
A12
A4
A1
A3
A11
A3
A0
A2
Not used
A1
Not used
A0
Not used
R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013
Page 1039 of 1076