HD6417750RF240DV Datasheet, PDF (846/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

Section 17 Smart Card Interface
SH7750, SH7750S, SH7750R Group
Serial Data Reception: Data reception in smart card mode uses the same processing procedure as
for the normal SCI. Figure 17.9 shows a sample reception processing flowchart.
1. Perform smart card interface mode initialization as described in Initialization above.
2. Check that the ORER flag and PER flag in SCSSR1 are cleared to 0. If either is set, perform
the appropriate receive error handling, then clear both the ORER and the PER flag to 0.
3. Repeat steps 2 and 3 until it can be confirmed that the RDRF flag is set to 1.
4. Read the receive data from SCRDR1.
5. To continue receiving data, clear the RDRF flag to 0 and go back to step 2.
6. To end reception, clear the RE bit to 0.
With the above processing, interrupt handling is possible.
If reception ends and the RDRF flag is set to 1 while the RIE bit is set to 1 and interrupt requests
are enabled, a receive-data-full interrupt (RXI) request will be generated. If an error occurs in
reception and either the ORER flag or the PER flag is set to 1, a transmit/receive-error interrupt
(ERI) request will be generated.
See Interrupt Operation in section 17.3.6 below for details.
If a parity error occurs during reception and the PER flag is set to 1, the received data is still
transferred to SCRDR1, and therefore this data can be read.
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Sep 24, 2013