HD6417750RF240DV Datasheet, PDF (322/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

Section 9 Power-Down Modes
SH7750, SH7750S, SH7750R Group
9.5 Standby Mode
9.5.1 Transition to Standby Mode
If a SLEEP instruction is executed when the STBY bit in STBCR is set to 1, the chip switches
from the program execution state to standby mode. In standby mode, the on-chip peripheral
modules halt as well as the CPU. Clock output from the CKIO pin is also stopped.
The CPU and cache register contents are retained. Some on-chip peripheral module registers are
initialized. The state of the peripheral module registers in standby mode is shown in table 9.4.
Table 9.4 State of Registers in Standby Mode
Module
Initialized Registers
Registers That Retain
Their Contents
Interrupt controller
—
All registers
User break controller
—
All registers
Bus state controller
—
All registers
On-chip oscillation circuits
—
All registers
Timer unit
TSTR register*
All registers except TSTR
Realtime clock
—
All registers
Direct memory access controller —
All registers
Serial communication interface See Appendix A, Address List See Appendix A, Address List
Notes: DMA transfer should be terminated before making a transition to standby mode. Transfer
results are not guaranteed if standby mode is entered during transfer.
* Not initialized when the realtime clock (RTC) is in use (see section 12, Timer Unit
(TMU)).
The procedure for a transition to standby mode is shown below.
1. Clear the TME bit in the WDT timer control register (WTCSR) to 0, and stop the WDT.
Set the initial value for the up-count in the WDT timer counter (WTCNT), and set the clock to
be used for the up-count in bits CKS2–CKS0 in the WTCSR register.
2. Set the STBY bit in the STBCR register to 1, then execute a SLEEP instruction.
3. When standby mode is entered and the chip's internal clock stops, a low-level signal is output
at the STATUS1 pin, and a high-level signal at the STATUS0 pin.
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R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013