HD6417750RF240DV Datasheet, PDF (1012/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

Section 22 Electrical Characteristics
SH7750, SH7750S, SH7750R Group
CKIO
A25–A5
A4–A0
CSn
RD/WR
RD
D63–D0
(read)
BS
T1 TB2 TB1 TB2 TB1 TB2 TB1 T2
t_AD
t_AD
t_AD
t_CSD
t_RWD
t_{RSD tRSD}
t_RDS
t_RDH
t_BSD t_BSD
t_CSD
t_RWD
t_RSD
t_RDS
t_RDH
RDY
DACKn
(SA: IO ← memory)
DACKn
(DA)
t_DACD t_{DACD tDACD}
t_DACD
t_DACD
Legend:
IO: DACK device
SA: Single address DMA transfer
DA: Dual address DMA transfer
DACK set to active-high
Figure 22.19 Burst ROM Bus Cycle (No Wait)
Page 960 of 1076
R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013