HD6417750RF240DV Datasheet, PDF (1086/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

Appendix D CKIO2ENB Pin Configuration
SH7750, SH7750S, SH7750R Group
CKIO2ENB
Description
0
RD2, RD/WR2, and CKIO2 have the same pin states as RD, RD/WR, and
CKIO, respectively
1
RD2, RD/WR2, and CKIO2 are in the high-impedance state
Note: CKIO is fed back to PLL2 to coordinate the external clock and internal clock phases.
However, CKIO2 is not fed back.
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R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013