82801FB Datasheet, PDF (89/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

Pin States
3.4
Power Planes for Input Signals
Table 3-5 and Table 3-6 shows the power plane associated with each input signal, as well as what
device drives the signal at various times. Valid states include:
High
Low
Static: Will be high or low, but will not change
Driven: Will be high or low, and is allowed to change
Running: For input clocks
Table 3-5. Power Plane for Input Signals for Desktop Configurations (Sheet 1 of 3)
Signal Name
A20GATE
ACZ_BIT_CLK
(AC ‘97 Mode)
ACZ_SDIN[2:0]
(AC ‘97 Mode)
ACZ_SDIN[2:0]
(Intel High
Definition Audio
Mode)
CLK14
CLK48
Power Well
Vcc3_3
Vcc3_3
VccSus3_3
VccSus3_3
Vcc3_3
Vcc3_3
Driver During Reset
External Microcontroller
AC ’97 Codec
AC ’97 Codec
Intel High Definition Audio
Codec
Clock Generator
Clock Generator
S1
Static
Low
Low
S3_COLD1
Low
Low
Low
Low
Low
Running
Low
Running
Low
DDREQ
DMI_CLKP,
DMI_CLKN
EE_DIN
FERR#
GPI[6]
Vcc3_3
Vcc3_3
VccSus3_3
V_CPU_IO
Vcc3_3
GPI[7]
Vcc3_3
GPI[8]
VccSus3_3
GPI[12]
Vcc3_3
GPI[13]
VccSus3_3
PERp[1], PERn[1]
PERp[2], PERn[2]
PERp[3], PERn[3]
PERp[4], PERn[4]
Vcc3_3
IDE Device
Clock Generator
EEPROM Component
Processor
External Device or External
Pull-up/Pull-down
External Device or External
Pull-up/Pull-down
External Device or External
Pull-up/Pull-down
External Device or External
Pull-up/Pull-down
External Device or External
Pull-up/Pull-down
PCI Express* Device
Static
Running
Driven
Static
Driven
Driven
Driven
Driven
Driven
Driven
Low
Low
Driven
Low
Off
Off
Driven
Driven
Driven
Driven
S4/S5
Low
Low
Low
Low
Low
Low
Low
Low
Driven
Low
Off
Off
Driven
Driven
Driven
Driven
Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet
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