82801FB Datasheet, PDF (290/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

LAN Controller Registers (B1:D8:F0)
8.1.21
8.1.22
NXT_PTR — Next Item Pointer
(LAN Controller—B1:D8:F0)
Offset Address: DDh
Default Value: 00h
Attribute:
Size:
RO
8 bits
Bit
Description
7:0
Next Item Pointer (NXT_PTR) — RO. Hardwired to 00b to indicate that power management is the
last item in the capabilities list.
PM_CAP — Power Management Capabilities
(LAN Controller—B1:D8:F0)
Offset Address:
Default Value:
DE–DFh
FE21h (In Desktop)
7E21h (In Mobile)
Attribute:
Size:
RO
16 bits
Bit
Description
15:11
10
9
8:6
5
4
3
2:0
PME Support (PME_SUP) — RO. Hardwired to 11111b. This 5-bit field indicates the power states in
which the LAN controller may assert PME#. The LAN controller supports wake-up in all power
states.
D2 Support (D2_SUP) — RO. Hardwired to 1 to indicate that the LAN controller supports the D2
power state.
D1 Support (D1_SUP) — RO. Hardwired to 1 to indicate that the LAN controller supports the D1
power state.
Auxiliary Current (AUX_CUR) — RO. Hardwired to 000b to indicate that the LAN controller
implements the Data registers. The auxiliary power consumption is the same as the current
consumption reported in the D3 state in the Data register.
Device Specific Initialization (DSI) — RO. Hardwired to 1 to indicate that special initialization of this
function is required (beyond the standard PCI configuration header) before the generic class device
driver is able to use it. DSI is required for the LAN controller after D3-to-D0 reset.
Reserved
PME Clock (PME_CLK) — RO. Hardwired to 0 to indicate that the LAN controller does not require a
clock to generate a power management event.
Version (VER) — RO. Hardwired to 010b to indicate that the LAN controller complies with of the PCI
Power Management Specification, Revision 1.1.
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Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet