82801FB Datasheet, PDF (748/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

Electrical Characteristics
Table 22-13. Ultra ATA Timing (Mode 0, Mode 1, Mode 2) (Sheet 2 of 2)
Sym
Parameter1
Mode 0
(ns)
Min Max
Mode 1
(ns)
Min Max
Mode 2
(ns)
Min Max
Measuring
Location
Figure
STROBE output released-to-
t93 driving to the first transition of
critical timing (Tzfs)
0
–
0
–
0
–
Device
Connector
22-12
Data Output Released-to-Driving
t94 Until the First Tunisian of Critical
Timing (Tdzfs)
70
–
48
–
31
–
Sender
Connector
22-9
t95 Unlimited Interlock Time (Tui)
0
–
0
–
0
–
Host
Connector
22-9
Maximum time allowed for output
t96a drivers to release (from asserted
– 10 – 10 – 10
Note 2
or negated) (Taz)
t96b
Minimum time for drivers to assert
or negate (from released) (Tzad)
0
–
0
–
0
–
Device
Connector
Ready-to-final-STROBE time (no
t97
STROBE edges shall be sent this
long after negation of DMARDY#)
–
75
–
70
–
60
Sender
Connector
22-9
(Trfs)
t98a
Maximum time before releasing
IORDY (Tiordyz)
–
20
–
20
–
20
Device
Connector
t98b
Minimum time before driving
IORDY (see Note 2) (Tziordy)
0
–
0
–
0
–
Device
Connector
Time from STROBE edge to
t99
negation of DMARQ or assertion
of STOP (when sender terminates
50
–
50
–
50
–
Sender
Connector
22-11
a burst) (Tss)
NOTES:
1. The specification symbols in parentheses correspond to the AT Attachment – 6 with Packet Interface
(ATA/ATAPI – 6) specification name.
2. See the AT Attachment – 6 with Packet Interface (ATA/ATAPI – 6) specification for further details on
measuring these timing parameters.
748
Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet