82801FB Datasheet, PDF (150/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

Functional Description
5.13.2.2
Power Management
For multiple-processor (or multiple-core) configurations in which more than one Stop Grant cycle
may be generated, the (G)MCH is expected to count Stop Grant cycles and only pass the last one
through to the ICH6. This prevents the ICH6 from getting out of sync with the processor on
multiple STPCLK# assertions.
Because the S1 state will have the STPCLK# signal active, the STPCLK# signal can be connected
to both processors. However, for ACPI implementations, the BIOS must indicate that the ICH6
only supports the C1 state for dual-processor designs.
In going to the S1 state for desktop, multiple Stop-Grant cycles will be generated by the processors.
The Intel ICH6 also has the option to assert the processor’s SLP# signal (CPUSLP#). It is assumed
that prior to setting the SLP_EN bit that causes the transition to the S1 state, the processors will not
be executing code that is likely to delay the Stop-Grant cycles.
In going to the S3, S4, or S5 states, the system will appear to pass through the S1 state; thus,
STPCLK# and SLP# are also used. During the S3, S4, and S5 states, both processors will lose
power. Upon exit from those states, the processors will have their power restored.
5.14
5.14.1
Power Management (D31:F0)
Features
• Support for Advanced Configuration and Power Interface, Version 2.0 (ACPI) providing
power and thermal management
— ACPI 24-Bit Timer
— Software initiated throttling of processor performance for Thermal and Power Reduction
— Hardware Override to throttle processor performance if system too hot
— SCI and SMI# Generation
• PCI PME# signal for Wake Up from Low-Power states
• System Clock Control
— (Mobile Only) ACPI C2 state: Stop Grant (using STPCLK# signal) halts processor’s
instruction stream
— (Mobile Only) ACPI C3 State: Ability to halt processor clock (but not memory clock)
— (Mobile Only) ACPI C4 State: Ability to lower processor voltage.
— (Mobile Only) CLKRUN# Protocol for PCI Clock Starting/Stopping
• System Sleep State Control
— ACPI S1 state: Stop Grant (using STPCLK# signal) halts processor’s instruction stream
(only STPCLK# active, and CPUSLP# optional)
— ACPI S3 state — Suspend to RAM (STR)
— ACPI S4 state — Suspend-to-Disk (STD)
— ACPI G2/S5 state — Soft Off (SOFF)
— Power Failure Detection and Recovery
• Streamlined Legacy Power Management for APM-Based Systems
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Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet