82801FB Datasheet, PDF (14/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

Contents
8.3.18
8.3.19
8.3.20
8.3.21
8.3.22
8.3.23
8.3.24
8.3.25
8.3.26
8.3.27
8.3.28
SP_MODE—Special Modes Register
(ASF Controller—B1:D8:F0) ................................................................................ 319
INPOLL_TCONF—Inter-Poll Timer Configuration Register
(ASF Controller—B1:D8:F0) ................................................................................ 319
PHIST_CLR—Poll History Clear Register
(ASF Controller—B1:D8:F0) ................................................................................ 320
PMSK1—Polling Mask 1 Register
(ASF Controller—B1:D8:F0) ................................................................................ 320
PMSK2—Polling Mask 2 Register
(ASF Controller—B1:D8:F0) ................................................................................ 321
PMSK3—Polling Mask 3 Register
(ASF Controller—B1:D8:F0) ................................................................................ 321
PMSK4—Polling Mask 4 Register
(ASF Controller—B1:D8:F0) ................................................................................ 321
PMSK5—Polling Mask 5 Register
(ASF Controller—B1:D8:F0) ................................................................................ 322
PMSK6—Polling Mask 6 Register
(ASF Controller—B1:D8:F0) ................................................................................ 322
PMSK7—Polling Mask 7 Register
(ASF Controller—B1:D8:F0) ................................................................................ 322
PMSK8—Polling Mask 8 Register
(ASF Controller—B1:D8:F0) ................................................................................ 323
9 PCI-to-PCI Bridge Registers (D30:F0) ......................................................................... 325
9.1 PCI Configuration Registers (D30:F0) .............................................................................. 325
9.1.1 VID— Vendor Identification Register (PCI-PCI—D30:F0) ................................... 326
9.1.2 DID— Device Identification Register (PCI-PCI—D30:F0) ................................... 326
9.1.3 PCICMD—PCI Command (PCI-PCI—D30:F0) ................................................... 327
9.1.4 PSTS—PCI Status Register (PCI-PCI—D30:F0) ................................................ 328
9.1.5 RID—Revision Identification Register (PCI-PCI—D30:F0).................................. 329
9.1.6 CC—Class Code Register (PCI-PCI—D30:F0) ................................................... 329
9.1.7 PMLT—Primary Master Latency Timer Register
(PCI-PCI—D30:F0).............................................................................................. 330
9.1.8 HEADTYP—Header Type Register (PCI-PCI—D30:F0) ..................................... 330
9.1.9 BNUM—Bus Number Register (PCI-PCI—D30:F0) ............................................ 330
9.1.10 SMLT—Secondary Master Latency Timer Register
(PCI-PCI—D30:F0).............................................................................................. 331
9.1.11 IOBASE_LIMIT—I/O Base and Limit Register
(PCI-PCI—D30:F0).............................................................................................. 331
9.1.12 SECSTS—Secondary Status Register (PCI-PCI—D30:F0) ................................ 332
9.1.13 MEMBASE_LIMIT—Memory Base and Limit Register
(PCI-PCI—D30:F0).............................................................................................. 333
9.1.14 PREF_MEM_BASE_LIMIT—Prefetchable Memory Base
and Limit Register (PCI-PCI—D30:F0)................................................................ 333
9.1.15 PMBU32—Prefetchable Memory Base Upper 32 Bits
Register (PCI-PCI—D30:F0) ............................................................................... 334
9.1.16 PMLU32—Prefetchable Memory Limit Upper 32 Bits
Register (PCI-PCI—D30:F0) ............................................................................... 334
9.1.17 CAPP—Capability List Pointer Register (PCI-PCI—D30:F0) .............................. 334
9.1.18 INTR—Interrupt Information Register (PCI-PCI—D30:F0) .................................. 334
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Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet