82801FB Datasheet, PDF (712/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

PCI Express* Configuration Registers
19.1.61
ESD — Element Self Description Register
(PCI Express—D28:F0/F1/F2/F3)
Address Offset: 184–187h
Default Value: See Description
Attribute:
Size:
RO
32 bits
Bit
Description
Port Number (PN) — RO. This field indicates the ingress port number for the root port. There is a
different value per port:
31:24
Port #
1
2
3
4
Value
01h
02h
03h
04h
23:16
15:8
7:4
3:0
Component ID (CID) — RO. This field returns the value of the ESD.CID field (Chipset Configuration
Space:Offset 0104h:bits 23:16) of the chip configuration section, that is programmed by platform
BIOS, since the root port is in the same component as the RCRB.
Number of Link Entries (NLE) — RO. (Default value is 01h) Indicates one link entry
(corresponding to the RCRB).
Reserved.
Element Type (ET) — RO. (Default value is 0h) Indicates that the element type is a root port.
19.1.62
ULD — Upstream Link Description Register
(PCI Express—D28:F0/F1/F2/F3)
Address Offset: 190–193h
Default Value: 00000001h
Attribute:
Size:
RO
32 bits
Bit
Description
31:24 Target Port Number (PN) — RO. Indicates the port number of the RCRB.
23:16
15:2
1
Target Component ID (TCID) — RO. This field returns the value of the ESD.CID field (Chipset
Configuration Space:Offset 0104h:bits 23:16) of the chip configuration section, that is programmed
by platform BIOS, since the root port is in the same component as the RCRB.
Reserved.
Link Type (LT) — RO. Indicates that the link points to the ICH6 RCRB.
0 Link Valid (LV) — RO. Indicates that this link entry is valid.
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Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet