82801FB Datasheet, PDF (267/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

Chipset Configuration Registers
7.1.44
7.1.45
D28IP—Device 28 Interrupt Pin Register
Offset Address: 310C–310Fh
Default Value: 00004321h
Attribute:
Size:
R/W
32-bit
Bit
31:16
15:12
11:8
7:4
3:0
Description
Reserved
PCI Express #4 Pin (P4IP) — R/W. This field indicates which pin the PCI Express* port #4 drives
as its interrupt.
0h = No interrupt
1h = INTA#
2h = INTB#
3h = INTC#
4h = INTD# (Default)
5h–7h = Reserved
PCI Express #3 Pin (P3IP) — R/W. This field indicates which pin the PCI Express port #3 drives
as its interrupt.
0h = No interrupt
1h = INTA#
2h = INTB#
3h = INTC# (Default)
4h = INTD#
5h–7h = Reserved
PCI Express #2 Pin (P2IP) — R/W. This field indicates which pin the PCI Express port #2 drives
as its interrupt.
0h = No interrupt
1h = INTA#
2h = INTB# (Default)
3h = INTC#
4h = INTD#
5h–7h = Reserved
PCI Express #1 Pin (P1IP) — R/W. This field indicates which pin the PCI Express port #1 drives
as its interrupt.
0h = No interrupt
1h = INTA# (Default)
2h = INTB#
3h = INTC#
4h = INTD#
5h–7h = Reserved
D27IP—Device 27 Interrupt Pin Register
Offset Address: 3110–3113h
Default Value: 00000001h
Attribute:
Size:
R/W
32-bit
Bit
Description
31:4 Reserved
Intel High Definition Audio Pin (ZIP) — R/W. This field indicates which pin the Intel High
Definition Audio controller drives as its interrupt.
0h = No interrupt
3:0
1h = INTA# (Default)
2h = INTB#
3h = INTC#
4h = INTD#
5h–7h = Reserved
Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet
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