82801FB Datasheet, PDF (490/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

SATA Controller Registers (D31:F2)
12.3.1.4
PI—Ports Implemented Register (D31:F2)
Address Offset: ABAR + 0Ch–0Fh
Default Value: 00000000h
Attribute:
Size:
R/WO, RO
32 bits
This register indicates which ports are exposed to the ICH6. It is loaded by platform BIOS. It
indicates which ports that the device supports are available for software to use. For ports that are
not available, software must not read or write to registers within that port.
12.3.1.5
Bit
Description
31:4 Reserved. Returns 0.
3
Ports Implemented Port 3 (PI3) — R/WO.
(Desktop _{0 = The port is not implemented.}
Only) _{1 = The port is implemented.}
3
Ports Implemented Port 3 (PI3) — RO.
(Mobile
Only) ^{0 = The port is not implemented.}
Ports Implemented Port 2 (PI2)— R/WO.
2
0 = The port is not implemented.
1 = The port is implemented.
1
Ports Implemented Port 1 (PI1) — R/WO.
(Desktop _{0 = The port is not implemented.}
Only) _{1 = The port is implemented.}
1
Ports Implemented Port 1 (PI1) — RO.
(Mobile
Only) ^{0 = The port is not implemented.}
Ports Implemented Port 0 (PI0) — R/WO.
0
0 = The port is not implemented.
1 = The port is implemented.
VS—AHCI Version (D31:F2)
Address Offset: ABAR + 10h–13h
Default Value: 00010000h
Attribute:
Size:
RO
32 bits
This register indicates the major and minor version of the AHCI specification. It is BCD encoded.
The upper two bytes represent the major version number, and the lower two bytes represent the
minor version number. Example: Version 3.12 would be represented as 00030102h. The current
version of the specification is 1.0 (00010000h).
Bit
31:16
15:0
Description
Major Version Number (MJR) — RO. This field indicates the major version is 1
Minor Version Number (MNR) — RO. This field indicates the minor version is 0.
490
Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet