82801FB Datasheet, PDF (691/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

PCI Express* Configuration Registers
19.1.26
DSTS—Device Status Register
(PCI Express—D28:F0/F1/F2/F3)
Address Offset: 4A–4Bh
Default Value: 0010h
Attribute:
Size:
R/WC, RO
16 bits
Bit
Description
15:6 Reserved
Transactions Pending (TDP) — RO. This bit has no meaning for the root port since only one
5 transaction may be pending to the Intel^® ICH6, so a read of this bit cannot occur until it has already
returned to 0.
4 AUX Power Detected (APD) — RO. The root port contains AUX power for wakeup.
3 Unsupported Request Detected (URD) — R/WC. Indicates an unsupported request was detected.
Fatal Error Detected (FED) — R/WC. This bit indicates a fatal error was detected.
2
0 = Fatal has not occurred.
1 = A fatal error occurred from a data link protocol error, link training error, buffer overflow, or
malformed TLP.
Non-Fatal Error Detected (NFED) — R/WC. This bit indicates a non-fatal error was detected.
1 ^{0 = Non-fatal has not occurred.}
1 = A non-fatal error occurred from a poisoned TLP, unexpected completions, unsupported
requests, completer abort, or completer timeout.
Correctable Error Detected (CED) — R/WC. This bit indicates a correctable error was detected.
0
0 = Correctable has not occurred.
1 = The port received an internal correctable error from receiver errors / framing errors, TLP CRC
error, DLLP CRC error, replay num rollover, replay timeout.
Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet
691