82801FB Datasheet, PDF (591/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

AC ’97 Audio Controller Registers (D30:F2)
16.1.21
PID—PCI Power Management Capability Identification
Register (Audio—D30:F2)
Address Offset:
Default Value:
Lockable:
50–51h
0001h
No
Attribute:
Size:
Power Well:
RO
16 bits
Core
Bit
Description
15:8 Next Capability (NEXT) — RO. This field indicates that the next item in the list is at offset 00h.
7:0
Capability ID (CAP) — RO.This field indicates that this pointer is a message signaled interrupt
capability
16.1.22 PC—Power Management Capabilities Register
(Audio—D30:F2)
Address Offset:
Default Value:
Lockable:
52–53h
C9C2h
No
Attribute:
Size:
Power Well:
This register is not affected by the D3_HOT to D0 transition.
RO
16 bits
Core
Bit
Description
15:11
10:9
8:6
5
4
3
2:0
PME Support — RO. This field indicates PME# can be generated from all D states.
Reserved.
Auxiliary Current — RO. This field reports 375 mA maximum suspend well current required when in
the D3_COLD state.
Device Specific Initialization (DSI)—RO. This field indicates that no device-specific initialization is
required.
Reserved — RO.
PME Clock (PMEC) — RO. This field indicates that PCI clock is not required to generate PME#.
Version (VER) — RO. This field indicates support for Revision 1.1 of the PCI Power Management
Specification.
Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet
591