82801FB Datasheet, PDF (706/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

PCI Express* Configuration Registers
19.1.51
V0CTL — Virtual Channel 0 Resource Control Register
(PCI Express—D28:F0/F1/F2/F3)
Address Offset: 114–117h
Default Value: 800000FFh
Attribute:
Size:
R/W, RO
32 bits
Bit
Description
31
30:27
26:24
23:20
19:17
16
15:8
7:1
Virtual Channel Enable (EN) — RO. Always set to 1. Virtual Channel 0 cannot be disabled.
Reserved.
Virtual Channel Identifier (VCID) — RO. Indicates the ID to use for this virtual channel.
Reserved.
Port Arbitration Select (PAS) — R/W. This field indicates which port table is being programmed. The
root complex takes no action on this setting since the arbitration is fixed and there is no arbitration
table.
Load Port Arbitration Table (LAT) — RO. The root port does not implement an arbitration table for
this virtual channel.
Reserved.
Transaction Class / Virtual Channel Map (TVM) — R/W. This field indicates which transaction
classes are mapped to this virtual channel. When a bit is set, this transaction class is mapped to the
virtual channel.
Bit
Transaction Class
7
Transaction Class 7
6
Transaction Class 6
5
Transaction Class 5
4
Transaction Class 4
3
Transaction Class 3
2
Transaction Class 2
1
Transaction Class 1
0
Transaction Class 0
0 Reserved. Transaction class 0 must always mapped to VC0.
19.1.52
V0STS — Virtual Channel 0 Resource Status Register
(PCI Express—D28:F0/F1/F2/F3)
Address Offset: 11A–11Bh
Default Value: 0000h
Attribute:
Size:
RO
16 bits
Bit
Description
15:2 Reserved.
VC Negotiation Pending (NP) — RO.
1 _{0 = Negotiation is not pending.}
1 = Indicates the Virtual Channel is still being negotiated with ingress ports.
0
Port Arbitration Tables Status (ATS). There is no port arbitration table for this VC, so this bit is
reserved as 0.
706
Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet