82801FB Datasheet, PDF (231/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

Functional Description
Table 5-57. Output Tag Slot 0
Bit
Primary Access Secondary Access
Example
Example
Description
15
1
14
1
13
1
12:3
X
2
0
1:0
00
1
Frame Valid
0
Slot 1 Valid, Command Address bit (Primary codec only)
0
Slot 2 Valid, Command Data bit (Primary codec only)
X
Slot 3–12 Valid
0
Reserved
01
Codec ID (00 reserved for primary; 01 indicate secondary;
10 indicate tertiary)
When accessing the codec registers, only one I/O cycle can be pending across the AC-link at any
time. The ICH6 implements write posting on I/O writes across the AC-link (i.e., writes across the
link are indicated as complete before they are actually sent across the link). In order to prevent a
second I/O write from occurring before the first one is complete, software must monitor the CAS
bit in the Codec Access Semaphore register which indicates that a codec access is pending. Once
the CAS bit is cleared, then another codec access (read or write) can go through. The exception to
this being reads to offset 54h/D4h/154h (slot 12) which are returned immediately with the most
recently received slot 12 data. Writes to offset 54h, D4h, and 154h (primary, secondary and tertiary
codecs), get transmitted across the AC-link in slots 1 and 2 as a normal register access. Slot 12 is
also updated immediately to reflect the data being written.
The controller does not issue back to back reads. It must get a response to the first read before
issuing a second. In addition, codec reads and writes are only executed once across the link, and are
not repeated.
5.22.3 AC-Link Low Power Mode
The AC-link signals can be placed in a low-power mode. When the AC ’97 Powerdown register
(26h), is programmed to the appropriate value, both ACZ_BIT_CLK and ACZ_SDIN will be
brought to, and held at a logic low voltage level.
Figure 5-14. AC-Link Powerdown Timing
ACZ_SYNC
ACZ_BIT_CLK
ACZ_SDOUT
slot 12
prev. frame
TAG
Write to Data
0x20 PR4
ACZ_SDIN[2:0]
slot 12
prev. frame
TAG
Note:
ACZ_BIT_CLK not to scale
Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet
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