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82801FB Datasheet, PDF (18/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family | |||
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Contents
10.8.3.5 PROC_CNTâProcessor Control Register .......................................... 408
10.8.3.6 LV2 â Level 2 Register ....................................................................... 410
10.8.3.7 LV3âLevel 3 Register (Mobile Only)................................................... 410
10.8.3.8 LV4âLevel 4 Register (Mobile Only)................................................... 410
10.8.3.9 PM2_CNTâPower Management 2 Control (Mobile Only) .................. 411
10.8.3.10 GPE0_STSâGeneral Purpose Event 0 Status Register..................... 411
10.8.3.11 GPE0_ENâGeneral Purpose Event 0 Enables Register .................... 414
10.8.3.12 SMI_ENâSMI Control and Enable Register ....................................... 416
10.8.3.13 SMI_STSâSMI Status Register .......................................................... 418
10.8.3.14 ALT_GP_SMI_ENâAlternate GPI SMI Enable Register..................... 420
10.8.3.15 ALT_GP_SMI_STSâAlternate GPI SMI Status Register.................... 420
10.8.3.16 DEVACT_STS â Device Activity Status Register............................... 421
10.8.3.17 SS_CNTâ Intel SpeedStep® Technology
Control Register (Mobile Only)............................................................. 422
10.8.3.18 C3_RESâ C3 Residency Register (Mobile Only) ............................... 422
10.9 System Management TCO Registers (D31:F0)................................................................ 423
10.9.1 TCO_RLDâTCO Timer Reload and Current Value Register.............................. 423
10.9.2 TCO_DAT_INâTCO Data In Register ................................................................ 424
10.9.3 TCO_DAT_OUTâTCO Data Out Register ......................................................... 424
10.9.4 TCO1_STSâTCO1 Status Register ................................................................... 424
10.9.5 TCO2_STSâTCO2 Status Register ................................................................... 426
10.9.6 TCO1_CNTâTCO1 Control Register.................................................................. 427
10.9.7 TCO2_CNTâTCO2 Control Register.................................................................. 428
10.9.8 TCO_MESSAGE1 and TCO_MESSAGE2 Registers.......................................... 428
10.9.9 TCO_WDCNTâTCO Watchdog Control Register .............................................. 429
10.9.10 SW_IRQ_GENâSoftware IRQ Generation Register .......................................... 429
10.9.11 TCO_TMRâTCO Timer Initial Value Register .................................................... 429
10.10 General Purpose I/O Registers (D31:F0) ......................................................................... 430
10.10.1 GPIO Register I/O Address Map ......................................................................... 430
10.10.2 GPIO_USE_SELâGPIO Use Select Register .................................................... 431
10.10.3 GP_IO_SELâGPIO Input/Output Select Register .............................................. 431
10.10.4 GP_LVLâGPIO Level for Input or Output Register ............................................ 432
10.10.5 GPO_BLINKâGPO Blink Enable Register ......................................................... 433
10.10.6 GPI_INVâGPIO Signal Invert Register............................................................... 434
10.10.7 GPIO_USE_SEL2âGPIO Use Select 2 Register[63:32] .................................... 435
10.10.8 GP_IO_SEL2âGPIO Input/Output Select 2 Register[63:32] .............................. 435
10.10.9 GP_LVL2âGPIO Level for Input or Output 2 Register[63:32] ............................ 436
11 IDE Controller Registers (D31:F1) ................................................................................ 437
11.1 PCI Configuration Registers (IDEâD31:F1) .................................................................... 437
11.1.1 VIDâVendor Identification Register (IDEâD31:F1) ........................................... 438
11.1.2 DIDâDevice Identification Register (IDEâD31:F1)............................................ 438
11.1.3 PCICMDâPCI Command Register (IDEâD31:F1) ............................................ 439
11.1.4 PCISTS â PCI Status Register (IDEâD31:F1).................................................. 440
11.1.5 RIDâRevision Identification Register (IDEâD31:F1)......................................... 441
11.1.6 PIâProgramming Interface Register (IDEâD31:F1) .......................................... 441
11.1.7 SCCâSub Class Code Register (IDEâD31:F1) ................................................ 441
11.1.8 BCCâBase Class Code Register (IDEâD31:F1)............................................... 442
11.1.9 CLSâCache Line Size Register (IDEâD31:F1)................................................. 442
11.1.10 PMLTâPrimary Master Latency Timer Register
(IDEâD31:F1) ..................................................................................................... 442
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Intel® I/O Controller Hub 6 (ICH6) Family Datasheet
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