82801FB Datasheet, PDF (523/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

UHCI Controllers Registers
13.2.6
SOFMOD—Start of Frame Modify Register
I/O Offset:
Default Value:
Base + (0Ch)
40h
Attribute:
Size:
R/W
8 bits
This 1-byte register is used to modify the value used in the generation of SOF timing on the USB.
Only the 7 least significant bits are used. When a new value is written into these 7 bits, the SOF
timing of the next frame will be adjusted. This feature can be used to adjust out any offset from the
clock source that generates the clock that drives the SOF counter. This register can also be used to
maintain real time synchronization with the rest of the system so that all devices have the same
sense of real time. Using this register, the frame length can be adjusted across the full range
required by the USB specification. Its initial programmed value is system dependent based on the
accuracy of hardware USB clock and is initialized by system BIOS. It may be reprogrammed by
USB system software at any time. Its value will take effect from the beginning of the next frame.
This register is reset upon a host controller reset or global reset. Software must maintain a copy of
its value for reprogramming if necessary.
Bit
Description
7 Reserved
SOF Timing Value — R/W. Guidelines for the modification of frame time are contained in Chapter 7
of the USB Specification. The SOF cycle time (number of SOF counter clock periods to generate a
SOF frame length) is equal to 11936 + value in this field. The default value is decimal 64 which gives
a SOF cycle time of 12000. For a 12 MHz SOF counter clock input, this produces a 1 ms Frame
period. The following table indicates what SOF Timing Value to program into this field for a certain
frame period.
Frame Length (# 12 MHz Clocks)
(decimal)
11936
6:0
11937
—
11999
12000
12001
—
12062
12063
SOF Timing Value (this register)
(decimal)
0
1
—
63
64
65
—
126
127
Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet
523