82801FB Datasheet, PDF (692/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

PCI Express* Configuration Registers
19.1.27
LCAP—Link Capabilities Register
(PCI Express—D28:F0/F1/F2/F3)
Address Offset: 4C–4Fh
Default Value: See bit description
Attribute:
Size:
R/W, RO
32 bits
Bit
31:24
Description
Port Number (PN) — RO. This field indicates the port number for the root port. This value is
different for each implemented port:
Function
D28:F0
D28:F1
D28:F2
D28:F3
Port #
1
2
3
4
Value of
PN Field
01h
02h
03h
04h
23:18
17:15
Reserved
L1 Exit Latency (EL1) — RO. Set to 010b to indicate an exit latency of 2 µs to 4 µs.
L0s Exit Latency (EL0) — RO. This field indicates as exit latency based upon common-clock
configuration.
14:12
11:10
9:4
3:0
LCLT.CCC
Value of EL0 (these bits)
0
MPC.UCEL (D28:F0/F1/F2/F3:D8h:bits20:18)
1
MPC.CCEL (D28:F0/F1/F2/F3:D8h:bits17:15)
NOTE:LCLT.CCC is at D28:F0/F1/F2/F3:50h:bit 6
Active State Link PM Support (APMS) — R/WO. This field indicates what level of active state link
power management is supported on the root port. Value fixed at 11b.
Bits
Definition
00b
Neither L0s nor L1 are supported
01b
L0s Entry Supported
10b
L1 Entry Supported
11b
Both L0s and L1 Entry Supported
Maximum Link Width (MLW) — RO. For the root ports, several values can be taken, based upon
the value of the chipset configuration register field RPC.PC (Chipset Configuration Registers:Offset
0224h:bits1:0):
Port #
1
2
3
4
Value of MLW Field
RPC.PC=00b RPC.PC=11b
01h
04h
01h
01h
01h
01h
01h
01h
Maximum Link Speed (MLS) — RO. Set to 1h to indicate the link speed is 2.5 Gb/s.
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Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet