82801FB Datasheet, PDF (483/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

SATA Controller Registers (D31:F2)
12.2 Bus Master IDE I/O Registers (D31:F2)
The bus master IDE function uses 16 bytes of I/O space, allocated via the BAR register, located in
Device 31:Function 2 Configuration space, offset 20h. All bus master IDE I/O space registers can
be accessed as byte, word, or DWord quantities. Reading reserved bits returns an indeterminate,
inconsistent value, and writes to reserved bits have no affect (but should not be attempted). These
registers are only used for legacy operation. Software must not use these registers when running
AHCI. The description of the I/O registers is shown in Table 12-2.
Table 12-2. Bus Master IDE I/O Register Address Map
BAR+
Offset
00
01
Mnemonic
Register
BMICP
—
Command Register Primary
Reserved
02
BMISP Bus Master IDE Status Register Primary
03
04–07
08
09
—
BMIDP
BMICS
—
Reserved
Bus Master IDE Descriptor Table Pointer Primary
Command Register Secondary
Reserved
0A
BMISS Bus Master IDE Status Register Secondary
0B
0C–0F
—
BMIDS
Reserved
Bus Master IDE Descriptor Table Pointer Secondary
Default
Type
00h
R/W
—
RO
00h
R/W, R/WC,
RO
—
RO
xxxxxxxxh
R/W
00h
R/W
—
RO
00h
R/W, R/WC,
RO
—
RO
xxxxxxxxh
R/W
Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet
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