82801FB Datasheet, PDF (380/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

LPC Interface Bridge Registers (D31:F0)
10.5 Advanced Programmable Interrupt Controller
(APIC)(D31:F0)
10.5.1 APIC Register Map (LPC I/F—D31:F0)
The APIC is accessed via an indirect addressing scheme. Two registers are visible by software for
manipulation of most of the APIC registers. These registers are mapped into memory space. The
registers are shown in Table 10-4.
Table 10-4. APIC Direct Registers (LPC I/F—D31:F0)
Address
Mnemonic
Register Name
FEC0_0000h
FEC0_0010h
FECO_0040h
IND
DAT
EOIR
Index
Data
EOI
Size
8 bits
32 bits
32 bits
Type
R/W
R/W
WO
Table 10-5 lists the registers which can be accessed within the APIC via the Index Register. When
accessing these registers, accesses must be done one DWord at a time. For example, software
should never access byte 2 from the Data register before accessing bytes 0 and 1. The hardware
will not attempt to recover from a bad programming model in this case.
Table 10-5. APIC Indirect Registers (LPC I/F—D31:F0)
Index
Mnemonic
Register Name
00
01
02–0F
10–11
12–13
...
3E–3F
40–FF
ID
Identification
VER
Version
—
Reserved
REDIR_TBL0 Redirection Table 0
REDIR_TBL1 Redirection Table 1
...
...
REDIR_TBL23 Redirection Table 23
—
Reserved
Size
32 bits
32 bits
—
64 bits
64 bits
...
64 bits
—
Type
R/W
RO
RO
R/W, RO
R/W, RO
...
R/W, RO
RO
10.5.2
.
IND—Index Register (LPC I/F—D31:F0)
Memory Address FEC0_0000h
Default Value: 00h
Attribute:
Size:
R/W
8 bits
The Index Register will select which APIC indirect register to be manipulated by software. The
selector values for the indirect registers are listed in Table 10-5. Software will program this register
to select the desired APIC internal register
Bit
Description
7:0 APIC Index — R/W. This is an 8-bit pointer into the I/O APIC register table.
380
Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet