82801FB Datasheet, PDF (642/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

Intel^® High Definition Audio Controller Registers (D27:F0)
18.1.32
DEVC—Device Control Register
(Intel^® High Definition Audio Controller—D27:F0)
Address Offset: 78h
Default Value: 0800h
Attribute:
Size:
R/W, RO
16 bits
Bit
Description
15
14:12
11
10
9
8
7:5
4
3
2
1
0
Reserved
Max Read Request Size — RO. Hardwired to 0 enabling 128B maximum read request size.
No Snoop Enable (NSNPEN) — R/W.
0 = The Intel High Definition Audio controller will not set the No Snoop bit. In this case, isochronous
transfers will not use VC1 (VCi) even if it is enabled since VC1 is never snooped. Isochronous
transfers will use VC0.
1 = The Intel High Definition Audio controller is permitted to set the No Snoop bit in the Requester
Attributes of a bus master transaction. In this case, VC0 or VC1 may be used for isochronous
transfers.
Note: This bit is not reset on D3_HOT to D0 transition; however, it is reset by PLTRST#.
Auxiliary Power Enable — RO. Hardwired to 0, indicating that Intel High Definition Audio device
does not draw AUX power
Phantom Function Enable — RO. Hardwired to 0 disabling phantom functions.
Extended Tag Field Enable — RO. Hardwired to 0 enabling 5-bit tag.
Max Payload Size — RO. Hardwired to 0 indicating 128B.
Enable Relaxed Ordering — RO. Hardwired to 0 disabling relaxed ordering.
Unsupported Request Reporting Enable — RO. Not implemented. Hardwired to 0.
Fatal Error Reporting Enable — RO. Not implemented. Hardwired to 0.
Non-Fatal Error Reporting Enable — RO. Not implemented. Hardwired to 0.
Correctable Error Reporting Enable — RO. Not implemented. Hardwired to 0.
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Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet