82801FB Datasheet, PDF (288/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

LAN Controller Registers (B1:D8:F0)
8.1.14
SID — Subsystem Identification
(LAN Controller—B1:D8:F0)
Offset Address: 2E–2Fh
Default Value: 0000h
Attribute:
Size:
RO
16 bits
Bit
15:0 Subsystem ID (SID) — RO.
Description
Note:
The ICH6’s integrated LAN controller provides support for configurable Subsystem ID and
Subsystem Vendor ID fields. After reset, the LAN controller automatically reads addresses Ah
through Ch, and 23h of the EEPROM. The LAN controller checks bits 15:13 in the EEPROM word
Ah, and functions according to Table 8-2.
Table 8-2. Configuration of Subsystem ID and Subsystem Vendor ID via EEPROM
Bits 15:14 Bit 13 Device ID Vendor ID
Revision ID
Subsystem ID
11b, 10b,
00b
01b
01b
X
1051h
8086h
00h
0b Word 23h
8086h
00h
1b
Word 23h
Word Ch
80h + Word Ah,
bits 10:8
0000h
Word Bh
Word Bh
Subsystem
Vendor ID
0000h
Word Ch
Word Ch
NOTES:
1. The Revision ID is subject to change according to the silicon stepping.
2. The Device ID is loaded from Word 23h only if the value of Word 23h is not 0000h or FFFFh
8.1.15 CAP_PTR — Capabilities Pointer
(LAN Controller—B1:D8:F0)
Offset Address: 34h
Default Value: DCh
Attribute:
Size:
RO
8 bits
Bit
Description
7:0
Capabilities Pointer (CAP_PTR) — RO. Hardwired to DCh to indicate the offset within configuration
space for the location of the Power Management registers.
8.1.16 INT_LN — Interrupt Line Register
(LAN Controller—B1:D8:F0)
Offset Address: 3Ch
Default Value: 00h
Attribute:
Size:
R/W
8 bits
Bit
Description
7:0
Interrupt Line (INT_LN) — R/W. This field identifies the system interrupt line to which the LAN
controller’s PCI interrupt request pin (as defined in the Interrupt Pin Register) is routed.
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Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet