82801FB Datasheet, PDF (511/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

UHCI Controllers Registers
13.1.10
HEADTYP—Header Type Register
(USB—D29:F0/F1/F2/F3)
Address Offset:
Default Value:
0Eh
FN 0: 80h
FN 1: 00h
FN 2: 00h
FN 3: 00h
Attribute:
Size:
RO
8 bits
For functions 1, 2, and 3, this register is hardwired to 00h. For function 0, bit 7 is determined by the
values in the USB Function Disable bits (11:8 of the Function Disable register Chipset
Configuration Registers:Offset 3418h).
Bit
Description
Multi-Function Device — RO.
0 = Single-function device.
1 = Multi-function device.
Since the upper functions in this device can be individually hidden, this bit is based on the function-
disable bits in Chipset Configuration Space:Offset 3418h as follows:
D29:F7_Disable D29:F3_Disable D29:F2_Disable D29:F1_Disable Multi-Function
7
(bit 15)
(bit 11)
(bit10)
(bit 9)
Device (this bit)
0b
X
X
X
1
X
0b
X
X
1
X
X
0b
X
1
X
X
X
0b
1
1
1
1
1
0
6:0 Configuration Layout. Hardwired to 00h, which indicates the standard PCI configuration layout.
13.1.11
BASE—Base Address Register
(USB—D29:F0/F1/F2/F3)
Address Offset:
Default Value:
20–23h
00000001h
Attribute:
Size:
R/W, RO
32 bits
Bit
Description
31:16 Reserved
15:5
Base Address — R/W. Bits [15:5] correspond to I/O address signals AD [15:5], respectively. This
gives 32 bytes of relocatable I/O space.
4:1 Reserved
0
Resource Type Indicator (RTE) — RO. Hardwired to 1 to indicate that the base address field in this
register maps to I/O space.
Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet
511