82801FB Datasheet, PDF (192/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

Functional Description
5.18.3
5.18.4
Periodic vs. Non-Periodic Modes
Non-Periodic Mode
Timer 0 is configurable to 32 (default) or 64-bit mode, whereas Timers 1 and 2 only support 32-bit
mode (See Section 20.1.5).
All three timers support non-periodic mode.
Consult section 2.3.9.2.1 of the IA-PC HPET Specification for a description of this mode.
Periodic Mode
Timer 0 is the only timer that supports periodic mode. Consult section 2.3.9.2.2 of the IA-PC
HPET Specification for a description of this mode.
The following usage model is expected:
1. Software clears the ENABLE_CNF bit to prevent any interrupts
2. Software Clears the main counter by writing a value of 00h to it.
3. Software sets the TIMER0_VAL_SET_CNF bit.
4. Software writes the new value in the TIMER0_COMPARATOR_VAL register
5. Software sets the ENABLE_CNF bit to enable interrupts.
The Timer 0 Comparator Value register cannot be programmed reliably by a single 64-bit write in a
32-bit environment except if only the periodic rate is being changed during run-time. If the actual
Timer 0 Comparator Value needs to be reinitialized, then the following software solution will
always work regardless of the environment:
1. Set TIMER0_VAL_SET_CNF bit
2. Set the lower 32 bits of the Timer0 Comparator Value register
3. Set TIMER0_VAL_SET_CNF bit
4. 4) Set the upper 32 bits of the Timer0 Comparator Value register
Enabling the Timers
The BIOS or operating system PnP code should route the interrupts. This includes the Legacy Rout
bit, Interrupt Rout bit (for each timer), interrupt type (to select the edge or level type for each timer)
The Device Driver code should do the following for an available timer:
1. Set the Overall Enable bit (Offset 04h, bit 0).
2. Set the timer type field (selects one-shot or periodic).
3. Set the interrupt enable
4. Set the comparator value
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Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet