82801FB Datasheet, PDF (433/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

LPC Interface Bridge Registers (D31:F0)
10.10.5
GPO_BLINK—GPO Blink Enable Register
Offset Address:
Default Value:
Lockable:
GPIOBASE +18h
0004 0000h
No
Attribute:
Size:
Power Well:
R/W
32-bit
See bit description
Bit
28:27, 25
19:18
(Desktop
Only)
19
(Mobile
Only)
Description
GP_BLINK[28:27, 25] — R/W. The setting of this bit has no effect if the corresponding GPIO
signal is programmed as an input.
0 = The corresponding GPIO will function normally.
1 = If the corresponding GPIO is programmed as an output, the output signal will blink at a rate
of approximately once per second. The high and low times have approximately 0.5
seconds each. The GP_LVL bit is not altered when this bit is set.
The value of the corresponding GP_LVL bit remains unchanged during the blink process, and
does not effect the blink in any way. The GP_LVL bit is not altered when programmed to blink. It
will remain at its previous value.
These bits correspond to GPIO in the Resume well. These bits revert to the default value based
on RSMRST# or a write to the CF9h register (but not just on PLTRST#).
GP_BLINK[n] — R/W. The setting of these bits will have no effect if the corresponding GPIO is
programmed as an input. These bits correspond to GPIO that are in the Core well, and will be
reset to their default values by PLTRST#.
0 = The corresponding GPIO will function normally.
1 = If the corresponding GPIO is programmed as an output, the output signal will blink at a rate
of approximately once per second. The high and low times are approximately 0.5 seconds
each. The GP_LVL bit is not altered when this bit is set.
GP_BLINK[n] — R/W. The setting of these bits will have no effect if the corresponding GPIO is
programmed as an input. These bits correspond to GPIO that are in the Core well, and will be
reset to their default values by PLTRST#.
0 = The corresponding GPIO will function normally.
1 = If the corresponding GPIO is programmed as an output, the output signal will blink at a rate
of approximately once per second. The high and low times are approximately 0.5 seconds
each. The GP_LVL bit is not altered when this bit is set.
NOTE: (Desktop Only) GPIO18 will blink by default immediately after reset. This signal could be connected to
an LED to indicate a failed boot (by programming BIOS to clear GP_BLINK18 after successful POST).
Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet
433