82801FB Datasheet, PDF (128/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

Functional Description
5.8
5.8.1
8254 Timers (D31:F0)
The ICH6 contains three counters that have fixed uses. All registers and functions associated with
the 8254 timers are in the core well. The 8254 unit is clocked by a 14.31818 MHz clock.
Counter 0, System Timer
This counter functions as the system timer by controlling the state of IRQ0 and is typically
programmed for Mode 3 operation. The counter produces a square wave with a period equal to the
product of the counter period (838 ns) and the initial count value. The counter loads the initial
count value 1 counter period after software writes the count value to the counter I/O address. The
counter initially asserts IRQ0 and decrements the count value by two each counter period. The
counter negates IRQ0 when the count value reaches 0. It then reloads the initial count value and
again decrements the initial count value by two each counter period. The counter then asserts IRQ0
when the count value reaches 0, reloads the initial count value, and repeats the cycle, alternately
asserting and negating IRQ0.
Counter 1, Refresh Request Signal
This counter provides the refresh request signal and is typically programmed for Mode 2 operation
and only impacts the period of the REF_TOGGLE bit in Port 61. The initial count value is loaded
one counter period after being written to the counter I/O address. The REF_TOGGLE bit will have
a square wave behavior (alternate between 0 and 1) and will toggle at a rate based on the value in
the counter. Programming the counter to anything other than Mode 2 will result in undefined
behavior for the REF_TOGGLE bit.
Counter 2, Speaker Tone
This counter provides the speaker tone and is typically programmed for Mode 3 operation. The
counter provides a speaker frequency equal to the counter clock frequency (1.193 MHz) divided by
the initial count value. The speaker must be enabled by a write to port 061h (see NMI Status and
Control ports).
Timer Programming
The counter/timers are programmed as follows:
1. Write a control word to select a counter.
2. Write an initial count for that counter.
3. Load the least and/or most significant bytes (as required by Control Word bits 5, 4) of the
16-bit counter.
4. Repeat with other counters.
Only two conventions need to be observed when programming the counters. First, for each counter,
the control word must be written before the initial count is written. Second, the initial count must
follow the count format specified in the control word (least significant byte only, most significant
byte only, or least significant byte and then most significant byte).
A new initial count may be written to a counter at any time without affecting the counter's
programmed mode. Counting is affected as described in the mode definitions. The new count must
follow the programmed count format.
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Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet