82801FB Datasheet, PDF (533/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

EHCI Controller Registers (D29:F7)
14.1.12
SID—USB EHCI Subsystem ID Register
(USB EHCI—D29:F7)
Address Offset:
Default Value:
Reset:
2E–2Fh
XXXXh
None
Attribute: R/W (special)
Size:
16 bits
Bit
Description
Subsystem ID (SID) — R/W (special). BIOS sets the value in this register to identify the Subsystem
ID. This register, in combination with the Subsystem Vendor ID register, enables the operating
15:0 ^{system to distinguish each subsystem from other(s).}
NOTE: Writes to this register are enabled when the WRT_RDONLY bit (D29:F7:80h, bit 0) is set
to 1.
14.1.13
CAP_PTR—Capabilities Pointer Register
(USB EHCI—D29:F7)
Address Offset: 34h
Default Value: 50h
Attribute: RO
Size:
8 bits
Bit
Description
7:0
Capabilities Pointer (CAP_PTR) — RO. This register points to the starting offset of the USB 2.0
capabilities ranges.
14.1.14
INT_LN—Interrupt Line Register
(USB EHCI—D29:F7)
Address Offset: 3Ch
Default Value: 00h
Attribute: R/W
Size:
8 bits
Bit
Description
7:0
Interrupt Line (INT_LN) — R/W. This data is not used by the Intel^® ICH6. It is used as a scratchpad
register to communicate to software the interrupt line that the interrupt pin is connected to.
14.1.15
INT_PN—Interrupt Pin Register
(USB EHCI—D29:F7)
Address Offset: 3Dh
Default Value: See Description
Attribute: RO
Size:
8 bits
Bit
Description
Interrupt Pin — RO. This reflects the value of D29IP.EIP (Chipset Configuration Registers:Offset
7:0 3108:bits 31:28).
NOTE: Bits 7:4 are always 0h
Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet
533