82801FB Datasheet, PDF (697/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

PCI Express* Configuration Registers
19.1.32
SLSTS—Slot Status Register
(PCI Express—D28:F0/F1/F2/F3)
Address Offset: 5A–5Bh
Default Value: 0000h
Attribute:
Size:
R/WC, RO
16 bits
Bit
Description
15:7 Reserved
Presence Detect State (PDS) — RO. If XCAP.SI (D28:F0/F1/F2/F3:42h:bit 8) is set (indicating that
this root port spawns a slot), then this bit:
6 0 = Indicates the slot is empty.
1 = Indicates the slot has a device connected.
Otherwise, if XCAP.SI is cleared, this bit is always set (1).
5 MRL Sensor State (MS) — Reserved as the MRL sensor is not implemented.
Command Completed (CC) — R/WC.
4
0 = Issued command not completed.
1 = The Hot-Plug controller completed an issued command. This is set when the last message of a
command is sent and indicates that software can write a new command to the slot controller.
Presence Detect Changed (PDC) — R/WC.
3 _{0 = No change in the PDS bit.}
1 = The PDS bit changed states.
2 MRL Sensor Changed (MSC) — Reserved as the MRL sensor is not implemented.
1 Power Fault Detected (PFD) — Reserved as a power controller is not implemented.
Attention Button Pressed (ABP) — R/WC.
0 _{0 = The attention button has not been pressed.}
1 = The attention button is pressed.
Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet
697