82801FB Datasheet, PDF (319/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

LAN Controller Registers (B1:D8:F0)
8.3.18
8.3.19
SP_MODE—Special Modes Register
(ASF Controller—B1:D8:F0)
Offset Address: F5h
Default Value: x0h
The register contains miscellaneous functions.
Attribute:
Size:
R/WC, RO
8 bits
Bit
Description
SMBus Activity Bit (SPE_ACT) — RO.
7 1 = ASF controller is active with a SMBus transaction. This is an indicator to software that the ASF
controller is still processing commands on the SMBus.
Watchdog Status (SPE_WDG) — R/WC.
6 _{0 = Software clears this bit by writing a 1 to it.}
1 = This bit is set when a watchdog expiration occurs.
Link Loss Status (SPE_LNK) — R/WC.
5 _{0 = Software clears this bit by writing a 1 to it.}
1 = This bit is set when a link loss occurs (link is down for more than 5 seconds).
4:0 Reserved
INPOLL_TCONF—Inter-Poll Timer Configuration Register
(ASF Controller—B1:D8:F0)
Offset Address: F6h
Default Value: 10h
Attribute:
Size:
R/W
8 bits
This register is used to load and hold the value (in increments of 5 ms) for the polling timer. This
value determines how often the ASF polling timer expires which determines the minimum idle
time between sensor polls.
Bit
Description
Inter-Poll Timer Configuration (IPTC_VAL) — R/W. This field identifies the time, in 5.24 ms units
7:0 that the ASF controller will wait between the end of the one ASF Poll Alert Message to start on the
next. The value 00h is illegal and unsupported.
Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet
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