82801FB Datasheet, PDF (672/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

Intel^® High Definition Audio Controller Registers (D27:F0)
18.2.39
SDFIFOS—Stream Descriptor FIFO Size Register
(Intel^® High Definition Audio Controller—D27:F0)
Memory Address:
Input Stream[0]: HDBAR + 90h Attribute:Input: RO
Input Stream[1]: HDBAR + B0h Output: R/W
Input Stream[2]: HDBAR + D0h
Input Stream[3]: HDBAR + F0h
Output Stream[0]: HDBAR + 110h
Output Stream[1]: HDBAR + 130h
Output Stream[2]: HDBAR + 150h
Output Stream[3]: HDBAR + 170h
Default Value:
Input Stream: 0077h
Output Stream: 00BFh
Size:
16 bits
Bit
Description
15:8 Reserved.
FIFO Size — RO (Input stream), R/W (Output stream). Indicates the maximum number of bytes that
could be fetched by the controller at one time. This is the maximum number of bytes that may have
been DMA’d into memory but not yet transmitted on the link, and is also the maximum possible value
that the PICB count will increase by at one time.
The value in this field is different for input and output streams. It is also dependent on the Bits per
Samples setting for the corresponding stream. Following are the values read/written from/to this
register for input and output streams, and for non-padded and padded bit formats:
Output Stream R/W value:
Value
Output Streams
0Fh = 16B
8, 16, 20, 24, or 32 bit Output Streams
1Fh = 32B
8, 16, 20, 24, or 32 bit Output Streams
3Fh = 64B
8, 16, 20, 24, or 32 bit Output Streams
7:0
7Fh = 128B
8, 16, 20, 24, or 32 bit Output Streams
BFh = 192B
8, 16, or 32 bit Output Streams
FFh = 256B
20, 24 bit Output Streams
NOTES:
1. All other values not listed are not supported.
2. When the output stream is programmed to an unsupported size, the hardware sets itself to the
default value (BFh).
3. Software must read the bit field to test if the value is supported after setting the bit field.
Input Stream RO value:
Value
Input Streams
77h = 120B
8, 16, 32 bit Input Streams
9Fh = 160B
20, 24 bit Input Streams
NOTE: The default value is different for input and output streams, and reflects the default state of
the BITS fields (in Stream Descriptor Format registers) for the corresponding stream.
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Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet