82801FB Datasheet, PDF (689/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

PCI Express* Configuration Registers
19.1.24
DCAP—Device Capabilities Register
(PCI Express—D28:F0/F1/F2/F3)
Address Offset: 44–47h
Default Value: 00000FE0h
Attribute:
Size:
RO
32 bits
Bit
Description
31:28
27:26
25:18
17:15
14
13
12
11:9
8:6
5
4:3
2:0
Reserved
Captured Slot Power Limit Scale (CSPS) — RO. Not supported.
Captured Slot Power Limit Value (CSPV) — RO. Not supported.
Reserved
Power Indicator Present (PIP) — RO. This bit indicates no power indicator is present on the root
port.
Attention Indicator Present (AIP) — RO. This bit indicates no attention indicator is present on the
root port.
Attention Button Present (ABP) — RO. This bit indicates no attention button is present on the root
port.
Endpoint L1 Acceptable Latency (E1AL) — RO. This field indicates more than 4 µs. This field
essentially has no meaning for root ports since root ports are not endpoints.
Endpoint L0 Acceptable Latency (E0AL) — RO. This field indicates more than 64 µs. This field
essentially has no meaning for root ports since root ports are not endpoints.
Extended Tag Field Supported (ETFS) — RO. This bit indicates that 8-bit tag fields are supported.
Phantom Functions Supported (PFS) — RO. No phantom functions supported.
Max Payload Size Supported (MPS) — RO. This field indicates the maximum payload size
supported is 128B.
Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet
689