82801FB Datasheet, PDF (535/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

EHCI Controller Registers (D29:F7)
14.1.18
PWR_CAP—Power Management Capabilities Register
(USB EHCI—D29:F7)
Address Offset: 52–53h
Default Value: C9C2h
Attribute: R/W (special)
Size:
16 bits
Bit
Description
15:11
10
9
8:6
5
4
3
2:0
PME Support (PME_SUP) — R/W (special). This 5-bit field indicates the power states in which the
function may assert PME#. The Intel^® ICH6 EHC does not support the D1 or D2 states. For all other
states, the ICH6 EHC is capable of generating PME#. Software should never need to modify this
field.
D2 Support (D2_SUP) — R/W (special).
0 = D2 State is not supported
1 = D2 State is supported
D1 Support (D1_SUP) — R/W (special).
0 = D1 State is not supported
1 = D1 State is supported
Auxiliary Current (AUX_CUR) — R/W (special). The ICH6 EHC reports 375 mA maximum
suspend well current required when in the D3_COLD state. This value can be written by BIOS when a
more accurate value is known.
Device Specific Initialization (DSI)— R/W (special). The ICH6 reports 0, indicating that no
device-specific initialization is required.
Reserved
PME Clock (PME_CLK) — R/W (special). The ICH6 reports 0, indicating that no PCI clock is
required to generate PME#.
Version (VER) — R/W (special). The ICH6 reports 010b, indicating that it complies with Revision
1.1 of the PCI Power Management Specification.
NOTES:
1. Normally, this register is read-only to report capabilities to the power management software. To report
different power management capabilities, depending on the system in which the ICH6 is used, bits 15:11 and
8:6 in this register are writable when the WRT_RDONLY bit (D29:F7:80h, bit 0) is set. The value written to
this register does not affect the hardware other than changing the value returned during a read.
2. Reset: core well, but not D3-to-D0 warm reset.
Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet
535