82801FB Datasheet, PDF (711/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

PCI Express* Configuration Registers
19.1.58
AECC — Advanced Error Capabilities and Control Register
(PCI Express—D28:F0/F1/F2/F3)
Address Offset: 158–15Bh
Default Value: 00000000h
Attribute:
Size:
RO
32 bits
Bit
Description
31:9 Reserved
8 ECRC Check Enable (ECE) — RO. ECRC is not supported.
7 ECRC Check Capable (ECC) — RO. ECRC is not supported.
6 ECRC Generation Enable (EGE) — RO. ECRC is not supported.
5 ECRC Generation Capable (EGC) — RO. ECRC is not supported.
4:0 First Error Pointer (FEP) — RO.
19.1.59
RES — Root Error Status Register
(PCI Express—D28:F0/F1/F2/F3)
Address Offset: 170–173h
Default Value: 00000000h
Attribute:
Size:
R/WC, RO
32 bits
Bit
Description
31:27
26:4
3
2
1
0
Advanced Error Interrupt Message Number (AEMN) — RO. There is only one error interrupt
allocated.
Reserved
Multiple ERR_FATAL/NONFATAL Received (MENR) — RO. For Intel^® ICH6, only one error will be
captured.
ERR_FATAL/NONFATAL Received (ENR) — R/WC.
0 = No error message received.
1 = Either a fatal or a non-fatal error message is received.
Multiple ERR_COR Received (MCR) — RO. For ICH6, only one error will be captured.
ERR_COR Received (CR) — R/WC.
0 = No error message received.
1 = A correctable error message is received.
19.1.60
RCTCL — Root Complex Topology Capability List Register
(PCI Express—D28:F0/F1/F2/F3)
Address Offset: 180–183h
Default Value: 00010005h
Attribute:
Size:
RO
32 bits
Bit
31:20
19:16
15:0
Description
Next Capability (NEXT) — RO. This field indicates the next item in the list, in this case, end of list.
Capability Version (CV) — RO. This field indicates the version of the capability structure.
Capability ID (CID) — RO. This field indicates is a root complex topology capability.
Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet
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