82801FB Datasheet, PDF (639/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

Intel^® High Definition Audio Controller Registers (D27:F0)
18.1.25
MMC—MSI Message Control Register
(Intel^® High Definition Audio Controller—D27:F0)
Address Offset: 62h
Default Value: 0080h
Attribute:
Size:
RO, R/W
16 bits
Bit
Description
15:8 Reserved
7
64b Address Capability (64ADD) — RO. Hardwired to 1. Indicates the ability to generate a 64-bit
message address
6:4
Multiple Message Enable (MME) — RO. Normally this is a R/W register. However since only 1
message is supported, these bits are hardwired to 000 = 1 message.
3:1 Multiple Message Capable (MMC) — RO. Hardwired to 0 indicating request for 1 message.
MSI Enable (ME) — R/W.
0 0 = an MSI may not be generated
1 = an MSI will be generated instead of an INTx signal.
18.1.26
MMLA—MSI Message Lower Address Register
(Intel^® High Definition Audio Controller—D27:F0)
Address Offset: 64h
Default Value: 00000000h
Attribute:
Size:
RO, R/W
32 bits
Bit
Description
31:2 Message Lower Address (MLA) — R/W. Lower address used for MSI message.
1:0 Reserved.
18.1.27
MMUA—MSI Message Upper Address Register
(Intel^® High Definition Audio Controller—D27:F0)
Address Offset: 68h
Default Value: 00000000h
Attribute:
Size:
R/W
32 bits
Bit
Description
31:0 Message Upper Address (MUA) — R/W. Upper 32-bits of address used for MSI message.
18.1.28
MMD—MSI Message Data Register
(Intel^® High Definition Audio Controller—D27:F0)
Address Offset: 6Ch
Default Value: 0000h
Attribute:
Size:
R/W
16 bits
Bit
Description
15:0 Message Data (MD) — R/W. Data used for MSI message.
Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet
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