82801FB Datasheet, PDF (51/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

Introduction
• TCO Timer. The ICH6’s integrated programmable TCO timer is used to detect system locks.
The first expiration of the timer generates an SMI# that the system can use to recover from a
software lock. The second expiration of the timer causes a system reset to recover from a
hardware lock.
• Processor Present Indicator. The ICH6 looks for the processor to fetch the first instruction
after reset. If the processor does not fetch the first instruction, the ICH6 will reboot the system.
• ECC Error Reporting. When detecting an ECC error, the host controller has the ability to
send one of several messages to the ICH6. The host controller can instruct the ICH6 to
generate either an SMI#, NMI, SERR#, or TCO interrupt.
• Function Disable. The ICH6 provides the ability to disable the following integrated functions:
AC ’97 Modem, AC ’97 Audio, IDE, LAN, USB, LPC, Intel High Definition Audio, SATA, or
SMBus. Once disabled, these functions no longer decode I/O, memory, or PCI configuration
space. Also, no interrupts or power management events are generated from the disable
functions.
• Intruder Detect. The ICH6 provides an input signal (INTRUDER#) that can be attached to a
switch that is activated by the system case being opened. The ICH6 can be programmed to
generate an SMI# or TCO interrupt due to an active INTRUDER# signal.
• SMBus 2.0. The ICH6 integrates an SMBus controller that provides an interface to manage
peripherals (e.g., serial presence detection (SPD) and thermal sensors) with host notify
capabilities.
System Management Bus (SMBus 2.0)
The ICH6 contains an SMBus Host interface that allows the processor to communicate with
SMBus slaves. This interface is compatible with most I²C devices. Special I²C commands are
implemented.
The ICH6’s SMBus host controller provides a mechanism for the processor to initiate
communications with SMBus peripherals (slaves). Also, the ICH6 supports slave functionality,
including the Host Notify protocol. Hence, the host controller supports eight command protocols of
the SMBus interface (see System Management Bus (SMBus) Specification, Version 2.0): Quick
Command, Send Byte, Receive Byte, Write Byte/Word, Read Byte/Word, Process Call, Block
Read/Write, and Host Notify.
ICH6’s SMBus also implements hardware-based Packet Error Checking for data robustness and
the Address Resolution Protocol (ARP) to dynamically provide address to all SMBus devices.
Intel High Definition Audio Controller
The Intel High Definition Audio specification defines a digital interface that can be used to attach
different types of codecs, such as audio and modem codecs. The ICH6 Intel High Definition Audio
digital link shares pins with the AC-link. Concurrent operation of Intel High Definition Audio and
AC ’97 functionality is not supported. The ICH6 Intel High Definition Audio controller supports
up to 3 codecs.
With the support of multi-channel audio stream, 32-bit sample depth, and sample rate up to
192 kHz, the Intel High Definition Audio controller provides audio quality that can deliver CE
levels of audio experience. On the input side, the ICH6 adds support for an arrays of microphones.
Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet
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