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82801FB Datasheet, PDF (80/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family | |||
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Pin States
3. Simulation data shows that these resistor values can range from 10 k⦠to 20 kâ¦.
4. Simulation data shows that these resistor values can range from 9 k⦠to 50 kâ¦.
5. The pull-down resistors on ACZ_SYNC (AC â97) and ACZ_SDOUT (AC â97) are enabled during reset and
also enabled when either:
- The LSO bit (bit 3) in the AC â97 Global Control Register (D30:F2:2C) is set to 1, or
- Both Function 2 and Function 3 of Device 30 are disabled.
Otherwise, the integrated Pull-down resistor is disabled.
6. Simulation data shows that these resistor values can range from 10 k⦠to 40 kâ¦.
7. The pull-down on this signal (in Intel High Definition Audio mode) is only enabled when in S3COLD.
8. Simulation data shows that these resistor values can range from 5.7 k⦠to 28.3 kâ¦.
9. The pull-up or pull-down on this signal is only enabled at boot/reset for strapping function.
10.Simulation data shows that these resistor values can range from 15 k⦠to 35 kâ¦.
11.The pull-down on this signal is only enabled when LAN_RST# is asserted.
12.The internal pull-up is enabled only when the PCIRST# pin is driven low and the PWROK indication is high.
13.Simulation data shows that these resistor values can range from 15 k⦠to 30 kâ¦.
14.Simulation data shows that these resistor values can range from 45 k⦠to 170 kâ¦.
15.Simulation data shows that these resistor values can range from 10 k⦠to 20 kâ¦. The internal pull-up is only
enabled only during PLTRST# assertion.
16. Simulation data shows that these resistor values can range from 10 k⦠to 30 kâ¦.
17.Simulation data shows that these resistor values can range from 14.25 k⦠to 24.8 kâ¦
3.2
IDE Integrated Series Termination Resistors
Table 3-2 shows the ICH6 IDE signals that have integrated series termination resistors.
Table 3-2. IDE Series Termination Resistors
Signal
DD[15:0], DIOW#, DIOR#, DREQ,
DDACK#, IORDY, DA[2:0], DCS1#,
DCS3#, IDEIRQ
Integrated Series Termination Resistor Value
approximately 33 ⦠(See Note)
NOTE: Simulation data indicates that the integrated series termination resistors are a nominal 33 ⦠but can
range from 21 ⦠to 75 â¦.
3.3
Output and I/O Signals Planes and States
Table 3-3 and Table 3-4 shows the power plane associated with the output and I/O signals, as well
as the state at various times. Within the table, the following terms are used:
âHigh-Zâ
Tri-state. ICH6 not driving the signal high or low.
âHighâ
ICH6 is driving the signal to a logic 1
âLowâ
ICH6 is driving the signal to a logic 0
âDefinedâ
Driven to a level that is defined by the function (will be high or low)
âUndefinedâ
ICH6 is driving the signal, but the value is indeterminate.
âRunningâ
Clock is toggling or signal is transitioning because function not stopping
âOffâ
The power plane is off, so ICH6 is not driving
Note that the signal levels are the same in S4 and S5, except as noted.
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Intel® I/O Controller Hub 6 (ICH6) Family Datasheet
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