82801FB Datasheet, PDF (215/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

Functional Description
5.21.1.1
until the interrupt status bit (INTR) has been set (indicating the completion of the command). Any
register values needed for computation purposes should be saved prior to issuing of a new
command, as the SMBus host controller updates all registers while completing the new command.
Using the SMB host controller to send commands to the ICH6’s SMB slave port is supported. The
ICH6 is fully compliant with the System Management Bus (SMBus) Specification, Version 2.0.
Slave functionality, including the Host Notify protocol, is available on the SMBus pins. The
SMLink and SMBus signals should not be tied together externally.
Command Protocols
In all of the following commands, a Host Status Register is used to determine the progress of the
command. While the command is in operation, the HOST_BUSY bit is set. If the command
completes successfully, the INTR bit will be set in the Host Status Register. If the device does not
respond with an acknowledge, and the transaction times out, the DEV_ERR bit is set. If software
sets the KILL bit in the Host Control Register while the command is running, the transaction will
stop and the FAILED bit will be set.
Quick Command
When programmed for a Quick Command, the Transmit Slave Address Register is sent. The PEC
byte is never appended to the Quick Protocol. Software should force the PEC_EN bit to 0 when
performing the Quick Command. Software must force the I2C_EN bit to 0 when running this
command. See section 5.5.1 of the System Management Bus (SMBus) Specification, Version 2.0 for
the format of the protocol.
Send Byte / Receive Byte
For the Send Byte command, the Transmit Slave Address and Device Command Registers are sent
For the Receive Byte command, the Transmit Slave Address Register is sent. The data received is
stored in the DATA0 register. Software must force the I2C_EN bit to 0 when running this
command.
The Receive Byte is similar to a Send Byte, the only difference is the direction of data transfer. See
sections 5.5.2 and 5.5.3 of the System Management Bus (SMBus) Specification, Version 2.0 for the
format of the protocol.
Write Byte/Word
The first byte of a Write Byte/Word access is the command code. The next 1 or 2 bytes are the data
to be written. When programmed for a Write Byte/Word command, the Transmit Slave Address,
Device Command, and Data0 Registers are sent. In addition, the Data1 Register is sent on a Write
Word command. Software must force the I2C_EN bit to 0 when running this command. See section
5.5.4 of the System Management Bus (SMBus) Specification, Version 2.0 for the format of the
protocol.
Read Byte/Word
Reading data is slightly more complicated than writing data. First the ICH6 must write a command
to the slave device. Then it must follow that command with a repeated start condition to denote a
read from that device's address. The slave then returns 1 or 2 bytes of data. Software must force the
I2C_EN bit to 0 when running this command.
Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet
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