82801FB Datasheet, PDF (507/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

UHCI Controllers Registers
13 UHCI Controllers Registers
13.1 PCI Configuration Registers
(USB—D29:F0/F1/F2/F3)
Note: Register address locations that are not shown in Table 13-1 and should be treated as Reserved
(see Section 6.2 for details).
Table 13-1. UHCI Controller PCI Register Address Map (USB—D29:F0/F1/F2/F3)
Offset
00–01h
02–03h
04–05h
06–07h
08h
09h
0Ah
0Bh
0Dh
0Eh
20–23h
2C–2Dh
2E–2Fh
3Ch
3Dh
60h
C0–C1h
C4h
C8h
Mnemonic
VID
DID
PCICMD
PCISTS
Register Name
Vendor Identification
Device Identification
PCI Command
PCI Status
RID
Revision Identification
PI
SCC
BCC
MLT
HEADTYP
BASE
SVID
SID
INT_LN
Programming Interface
Sub Class Code
Base Class Code
Master Latency Timer
Header Type
Base Address
Subsystem Vendor
Identification
Subsystem
Identification
Interrupt Line
INT_PN
Interrupt Pin
USB_RELNUM
USB_LEGKEY
USB_RES
CWP
Serial Bus Release
Number
USB Legacy Keyboard/
Mouse Control
USB Resume Enable
Core Well Policy
Function 0 Function 1 Function 2 Function 3
Default
Default
Default
Default
Type
8086h
2658h
0000h
0280h
See register
description.
00h
03h
0Ch
00h
80h
00000001h
8086h
2659h
0000h
0280h
See
register
description.
00h
03h
0Ch
00h
00h
00000001h
8086h
265Ah
0000h
0280h
See
register
description.
00h
03h
0Ch
00h
00h
00000001h
8086h
265Bh
0000h
0280h
See
register
description.
00h
03h
0Ch
00h
00h
00000001h
RO
RO
R/W, RO
R/WC, RO
RO
RO
RO
RO
RO
RO
R/W, RO
0000h
0000h
0000h
0000h
R/WO
0000h
0000h
0000h
0000h
R/WO
00h
00h
00h
00h
R/W
See register
description.
See
register
description.
See
register
description.
See
register
description.
RO
10h
10h
10h
10h
RO
2000h
00h
00h
2000h
00h
00h
2000h
00h
00h
2000h
00h
00h
R/W, RO
R/WC
R/W
R/W
NOTE: Refer to the Intel^® I/O Controller Hub 6 (ICH6) Family Specification Update for the value of the Revision
ID Register
Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet
507