82801FB Datasheet, PDF (455/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

SATA Controller Registers (D31:F2)
12 SATA Controller Registers
(D31:F2)
12.1 PCI Configuration Registers (SATA–D31:F2)
Note: Address locations that are not shown should be treated as Reserved.
All of the SATA registers are in the core well. None of the registers can be locked.
Table 12-1. SATA Controller PCI Register Address Map (SATA–D31:F2) (Sheet 1 of 2)
Offset
00–01h
Mnemonic
VID
Register Name
Vendor Identification
02–03h
DID
Device Identification
04–05h
06–07h
08h
PCICMD
PCISTS
RID
PCI Command
PCI Status
Revision Identification
09h
PI
Programming Interface
0Ah
SCC
Sub Class Code
0Bh
0Dh
10–13h
14–17h
18–1Bh
1C–1Fh
20–23h
BCC
PMLT
PCMD_BAR
PCNL_BAR
SCMD_BAR
SCNL_BAR
BAR
Base Class Code
Primary Master Latency Timer
Primary Command Block Base Address
Primary Control Block Base Address
Secondary Command Block Base Address
Secondary Control Block Base Address
Legacy Bus Master Base Address
24–27h
ABAR
AHCI Base Address
2C–2Dh
2E–2Fh
34h
3C
SVID
SID
CAP
INT_LN
Subsystem Vendor Identification
Subsystem Identification
Capabilities Pointer
Interrupt Line
3D
INT_PN Interrupt Pin
40–41h
42–43h
IDE_TIMP
IDE_TIMS
Primary IDE Timing
Secondary IDE Timing
Default
8086h
2651h ICH6
2652h ICH6R
2653h ICH6-M
0000h
02B0h
See register
description.
See register
description.
See register
description
01h
00h
00000001h
00000001h
00000001h
00000001h
00000001h
00000000h
0000h
0000h
70h
00h
See register
description.
0000h
0000h
Type
RO
RO
R/W, RO
R/WC, RO
RO
See register
description
See register
description
RO
RO
R/W, RO
R/W, RO
R/W, RO
R/W, RO
R/W, RO
See register
description
R/WO
R/WO
RO
R/W
RO
R/W
R/W
Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet
455